DS200TCDAG1BDB GE Speedtronic Mark V Digital Input/Output

GE DS200TCDAG1BDB Functional Overview

The GE DS200TCDAG1BDB acts as a primary communication hub for discrete signals within the Mark V architecture. Specifically, the board manages digital contact inputs from the DTBA and DTBB terminal boards. It also coordinates contact output signals, such as relays and solenoids, for the TCRA boards. The system typically houses this TCDA board within the digital I/O cores , , and . Once the board processes these signals, it relays them via the IONET to the TCQC or CTBA terminal boards. Therefore, the DS200TCDAG1BDB ensures synchronized data exchange between field devices and the central control processors.

Advanced Hardware Composition

This board features a robust assembly of industrial-grade components. The DS200TCDAG1BDB includes an LED panel for status monitoring, resistor network arrays for voltage regulation, and 12 dedicated relay channels. It operates on a stable +5 VDC power supply while managing a 28 VDC power supply voltage for its relay circuits. Furthermore, the board utilizes surface mount technology and a protective PCB coating to resist daily wear. Consequently, the hardware maintains high reliability even in environments with temperatures ranging from -30 to +65°C.

Configurable Jumper Settings

The GE DS200TCDAG1BDB offers extensive hardware customization through eight jumper switches (J1–J8). Specifically, Jumpers J2 and J3 manage the IONET termination resistors to prevent signal reflection. You must use jumpers J4, J5, and J6 to set the board's unique IONET ID for proper network addressing. Additionally, Jumper J7 enables the stall timer, a critical watchdog feature that monitors board health. While most hardware remains at factory settings, these jumpers allow you to tune the board for specific core configurations.

Technical Specifications

Regarding its mechanical design, the DS200TCDAG1BDB measures 15.9 cm by 17.8 cm and supports standard DIN-rail mounting. It represents a significant upgrade over the original DS200TCDAG1 parent board, incorporating three functional product revisions. These revisions ensure better backwards compatibility with the first two iterations of the TCDA series. These specifications make the board a versatile replacement for aging turbine control systems.

Connector Interface Map

Installation and Configuration

First, verify the Mark V core power is off before inserting the board. Align the DS200TCDAG1BDB with the factory-drilled mounting holes in the R1, Q11, or Q51 core. Next, secure the board and attach the shielded IONET cables to the JX1 or JX2 ports. After that, configure any necessary software constants for contact input inversions using the HMI's I/O Configuration Editor. Furthermore, ensure you correctly set the IONET ID jumpers to avoid address conflicts on the network. Finally, restore power and monitor the integrated LED panel to confirm the board has successfully initialized within the Mark V system.

Packaging List

• 1 x GE DS200TCDAG1BDB Digital I/O Board

• 1 x Technical Revision Status Sheet

• 1 x Anti-Static Protective Packaging

• Shipping Carrier: Fedex, UPS, DHL

FAQ

Q: In which cores does the system typically install the TCDA board?

The system places the board in the Q11, Q21, and Q51 digital I/O cores, and it interfaces with the R1 core.

Q: What is the function of the J7 jumper?

The J7 jumper enables the stall timer, which serves as a safety watchdog for the board's processing circuits.

Q: Does this board support TMR (Triple Modular Redundant) systems?

Yes. The DS200TCDAG1BDB is fully compatible with the Mark V TMR management architecture.

Q: How many relay channels are available on this module?

The board provides 12 relay channels for controlling solenoids and other discrete output devices.

Q: Can I use this board to replace an original DS200TCDAG1 parent board?

Yes. This board is backwards-compatible with the first two revisions, though it includes three significant functional improvements.